Nuvation

ATA-4 OPB IP Core for Xilinx EDK

Features | Target Device | Command Set | System Architecture
Extension Module |


Description

The ATA-4 / UDMA-33 IDE OPB Core is a drop-in ATA-Host IP core used for interfacing to an ATA-device. The core has all connections to interface to an OPB bus and IDE bus. The OPB bus is used for writing to and reading from the taskfile registers needed for the data transactions. It is also used to read/write the data from/to the ATA hard drive when a transaction is initiated. The core handles all transactions on the IDE bus for various commands that are dispatched from the system.

The ATA-4 OPB core from Nuvation is available either as an encrypted Netlist or as a source code license. This core is available for all Xilinx device families, and integrates with Xilinx PowerPC or MicroBlaze processors in the EDK Tool flow. Nuvation's User Guide provides detailed step-by-step instructions for quick and easy integration.


Features

• ATA/ATAPI-4 standard compliant host
• UDMA-33 transfer speed capabilities (33 MB/s max transfer speed)
• RX and TX FIFOs for data transfer through the Core
• DMA/UDMA and PIO data transfers supported
• Dedicated signal for executing Software Reset command
• Two Clock domains: Core Clock and System Clock domains
• Dedicated system side input bus for writing data to the ATA device
• Dedicated system side output bus for data read from the ATA device
• Required Core Clock Speed: 100MHz
• Available PIO Modes: 0 and 4
• Number of ATA devices supported on the IDE Bus: 1

Target Device

Xilinx Families: Spartan-3/3E, Virtex-II, Virtex-II Pro, Virtex-4, Virtex-5
Number of Slice FFs: 1250
Number of BRAMs: 2

Command Set

System Architecture

Extension Module

An extension module for 48-bit Line Bit Addressing (LBA) is available upon request (LBA-48 is a component of the ATA-6 specification for addressing HDDs >137GB). Please contact ip@nuvation.com.