Message from Nuvation's CEO:
Ladies and Gentlemen, the recession is over. In fact, it feels like we're in a "Party Like It's 1999".
A resurgent investment in technology and a decidedly optimistic business forecast have put Nuvation on track to exceed even our most optimistic growth forecasts.
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Nuvation HEADLINES 
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New IP
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ATA 4/5, UDMA 33/66 Core for Xilinx Spartan 3 |
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ATA 4/5, UDMA 33/66 for Altera Cyclone |
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PCI-Express Coming Soon |
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GFP-F IP Core Coming Soon |
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New Affiliations
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Lattice Certified FPGA Design Center |
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Intel PCI Express Developers Network |
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ADI Certified DSP Partner |
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Recipe Corner

Spring is here! Learn to make a spicy Cajun Gumbo from one of our own chefs!
A tested successful recipe for a quick and easy southern flavored soup.
See Recipe
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H.264 / AVC
The Emerging Video Compression Goliath
Significant advances in video compression over the last 15 years have enabled this technology to embed itself in a great diversity of products and services. From DVD players to video phones, compressed video is now an indispensable part of our daily life. While innovation of video compression methods are ongoing, much of what affects the market is employed using relatively few standardized CODECs. At the forefront of this technology, is the new H.264 / AVC standard.
Minimize Noise Pollution in your Circuits

Nuvation-SI's department manager, Ben Schramm, offers his insights on noise reduction. Noise analysis and reduction is an imperative step in board design, especially in an environment where electronics are shrinking in size and increasing in density and speed. Ben discusses Johnson noise, shot noise, flicker noise, clock jitter, phase noise, and metastability.
PCI Express Lane
PCI Express is emerging as the leading standard for high-speed serial interconnects. Are you ready for it? What are your options and design considerations? High-Bandwidth, low pin count, advanced switching, hot swapping, power management...
Flash Delaying your TTM?
A design note for System Designers on alternatives to designing with Flash memory in today's market...
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Design Cycle Optimization with Altera's SOPC Builder
This issue of the CURRENT features a guest article from Altera. Nuvation has completed many successful embedded processor designs in FPGAs (SOPCs) and recommends consideration of this relatively new architecture for designs requiring both microprocessor firmware and programmable logic. The blend of these two technologies in one tool flow and device represents a new challenge for traditional FPGA Verilog/VHDL engineers and MCU C/C++/Assembly engineers.
Altera's SOPC builder is an excellent tool that bridges the divide elegantly and efficiently. For example, we recently ported a DSP algorithm and MCU code to an Altera Cyclone with Nios processor using SOPC builder and had the code ported and debugged within just a few days.
Read more about design cycle optimization strategies using Altera's SOPC Builder...
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CycloneBot Rocks San Francisco
San Francisco, March 20, 2004 - The infamous CycloneBot once again does some serious damage in the ring. Known to the crowd as the $10,000 doughnut, CycloneBot is a high-tech spinning robot designed by Nuvation and CM Robotics, with titanium blades that makes use of Altera FPGAs with NIOS processors.

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Nuvation Helps Habitat for Humanity

Redwood City, Dec 13, 2003 - Nuvation helps to build a home at a Habitat site in the Bay Area. On a Saturday morning, 12 Nuvation employees came together to volunteer on a Habitat for Humanity project in Redwood City, California. From painting walls and landscaping, to digging holes and spackling, the Nuvation crew volunteered their time and energy for a great cause - affordable housing for families.

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