Nuvation HEADLINES 
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New IP
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ATA 4/5, UDMA 33/66 Core for Xilinx Spartan 3 |
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ATA 4/5, UDMA 33/66 for Altera Cyclone |
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PCI-Express Coming Soon |
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GFP-F IP Core Coming Soon |
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New Affiliations
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Lattice Certified FPGA Design Center |
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Intel PCI Express Developers Network |
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ADI Certified DSP Partner |
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Device Spotlight:
The ADI TigerSharc® ADSP-TS201S
  The Analog Devices' TigerSHARC® ADSP-TS201S Embedded Processor/DSP is this issue's Device Spotlight. The TS201 is an ultra-high performance, static superscalar processor optimized for large signal processing tasks and communications infrastructure. This is a hot-off-the-fab new generation of ADI's TigerSHARC® DSP family, which sports many improvements over the previous generation of TS101-S from ADI. The DSP combines very wide memory widths with dual computation blocks-- the compute blocks are capable of independent, or SIMD operation. One of the most impressive features of the DSP is that it supports BOTH fixed and floating point processing. The core supports 32- and 40-bit floating-point, in addition to 8-, 16-, 32- and 64-bit fixed-point operations. The static superscalar architecture of the TS201 can perform up to four instructions per cycle, performing twenty-four 16-bit integer operations, or six floating-point operations. This translates to a 1.2 billion MACs/s peak performance on 32-bit integer operations -- benchmarking a 1000-point Complex FFT in 15.7 us.
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Furthermore, the architecture of the TS201 includes four 128-bit internal data buses, enabling 128-bit data, instruction and I/O accesses -- and providing 33.6GBps of internal bandwidth to the 24 Mbits of on-chip DRAM. The DSP core clock runs up to 600 MHz, and the 64-bit external bus -- complete with full hooks to connect up to eight TS201s in a multiprocessing fashion -- runs at 100 MHz. One of the most intriguing bells and whistles we found was the four "Link-Ports" on the DSP. These are full-duplex serial ports capable of communicating with other LVDS-based devices (ideally, FPGAs or ASICs). Each Link-Port is capable of a sustained [bi-directional] throughput of 1 GByte per second.
This device was chosen as the DSP for one of Nuvation's embedded design projects earlier this year, despite being in beta status. "1.0 silicon" is planned for release in late April, and normally we wouldn't choose to design with pre-release silicon and tools. However, the TS201 was uniquely qualified for this application by its processing power and minimal latency. And we had the support of trusted partners to help us through the expected complications of being one of the first to design with a new processor.
The design involved creating a high-speed communications and processing engine using the TS201 and a Virtex II 4000 FPGA. The project encompassed high-speed board design, FPGA design, and embedded firmware work.
We should also mention that our FAE, Sami Saab, and others at Analog Devices went beyond the call of duty on this project. Without the great support we would not have been able to meet the client deadlines in light of the pre-release silicon & tools issues. Arrow Electronics also stepped up to expedite our customer's order after another distributor dropped the ball.
We are glad to say that the TS201 performed beyond expectations. The result of the project was a computation engine which outperformed the prior platform (which used an older DSP) by a speed factor of 6-8 times, according to our very satisfied client.
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