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ATA 4/5, UDMA 33/66 for Altera Cyclone |
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PCI-Express Coming Soon |
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GFP-F IP Core Coming Soon |
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New Affiliations
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Lattice Certified FPGA Design Center |
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Intel PCI Express Developers Network |
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ADI Certified DSP Partner |
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Flash Memory Supplier Delays
Modify your Design to avoid the current market lag for Flash devices
The technology sector is on the rise again. Economic growth is exceeding levels that haven't been witnessed for some time - a throwback to the tech hay days of the 1990's. Unfortunately, this recent upswing has also begun to give way to a familiar problem reminiscent of a few years back: that of output allocation by semiconductor manufacturers.
Spurred in part by the relentless growth in the cell-phone industry, flash memory is one well-sought-after component that was recently put on allocation by several of the market leaders in non-volatile memory manufacturing. As a system designer, how do you cope with this problem? When tackling a new design, it is a very real possibility that you may design in a common part that may very well be unobtainable when it comes time for production. Another scenario: You are a high-volume manufacturer of an established electronics product, and the recent surge in the economy has resulted in a sharp increase in demand for your product. Unfortunately, your flash supplier is unable to match your increased capacity requirements. What alternatives do you have?
Certainly, a desirable solution would have to minimize any changes to your original design and would have little impact on the cost of your product. If your system relies on parallel interface NOR flash memory for code execution, one way to overcome this problem is to replace your flash with an SRAM device and a serial non-volatile memory device, such as NAND flash or EEPROM. Improvements in NAND flash technology have made these low-cost devices highly reliable for data retention. A system designer may use a serial memory device to store execution code in non-volatile memory, and then upon power-up, a boatloader routine in the microcontroller would immediately transfer execution code out of the serial non-volatile memory into SRAM. Normal code execution would then commence out of SRAM. Many second sources now exist for your generic SRAM component, and by planning ahead you have avoided costly setbacks in your production schedule due to NOR flash allocation problems.
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