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Designing High-Speed Traces (Part 1)
Signal Integrity Problems & Solutions
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  Designing high-speed traces involves many design principles that need to be taken into consideration to maintain signal integrity. In a 3-part article series, we will explore some of the main guidelines, and discuss methods to achieve the best possible signal quality for your project. In Part 1 we'll begin with the treatment of your high-speed traces as lossy transmission lines.
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High-Speed Traces = Lossy Transmission Lines
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When dealing with high-speed traces on printed circuit boards, you're dealing with lossy transmission lines. There are 2 types of losses, one is a copper loss due to skin effect, and the other is the loss tangent of the dielectric.
Copper traces have a loss resistance within the trace itself. In a common copper line with a trace width of 4 mils and a 2.5GHz signal (which has frequency components above 10GHz), there is an approximate loss resistance of 2 ohms per inch. The normal electrical resistance in the line slows the rise time. So, for a perfectly rectangular pulse in a perfectly matched transmission line system, the rise time will be exponential. The longer the line is, the slower the rise time becomes.
At low frequencies, a transmission line can be modeled as a series inductance and a shunt capacitor. The inductance is a function of trace length and the capacitance is a function of the dielectric constant of the board spacing between the trace and ground plane and the area of the trace. Displacement current occurs inside the dielectric as the atoms within the dielectric are polarized in response to the electric field generated by the signal on the trace. Within the dielectric there is some resistance to the movement of the atoms. This resistance provides a loss path and its magnitude is measured as the loss tangent or dissipation factor of the dielectric. Both the resistance of the trace and the loss tangent of the dielectric are frequency dependent, i.e. they increase as the frequency increases.
The copper loss is equivalent to a series resistor, and the loss tangent of the dielectric equates to a parallel resistor. The result is a frequency dependant voltage divider. The peak-to-peak signal drops as the voltage division ratio increases as a function of frequency.
In high frequency systems, the electric and magnetic fields are generated by the propagated waves down the lines, which need to be taken into account when modeling. This can be calculated by solving Maxwell's equations with field solving tools. Every transmission line can be represented by an LC ladder network. For frequencies where the length of the line is greater than one wavelength at the signal frequency, the inductance and capacitance of the line should not be lumped into a single value. Under these circumstances, the capacitance and inductance should be distributed along the length of the line. In other words, we define an inductance and capacitance per unit length, resulting in a number of pH and fF per mm. Mathematically we use the limit as ΔL, ΔC and ΔR → 0 over a unit distance that also approaches 0 in the field solver to determine the losses and impedance of the transmission line. The field solver also allows us to model the time domain characteristics (cross talk, rise time, overshoot etc.) of the transmission line.
When the frequency is very low, the dimensions of the wire are a very small fraction of the wavelength. It can be treated like a simple copper wire; a conductor between 2 points. One factor that mitigates this is the rise time of the signal. It is possible to have a 1 MHz clock with a 10ps rise time. Under these conditions there are frequency components out to 100GHz that will affect the behavior of the system. If the rise time is increased so that the signal propagating down the line has no less than a 10ns rise time, the high frequency components are reduced to 100MHz. 100MHz represents a wavelength of about 1.5m in a standard FR4 PCB material.
In a standard PCB material the wavelength of a 1GHz signal is approximately 6 inches or the signal propagates a distance of 6 inches in 1 ns. For a 100ns period (10MHz) having a 10ns rise and fall time, 6 inches represents an insignificant fraction of a wavelength, and only the "DC" characteristics of the board affect it. So, signals may be connected point-to-point or daisy chained with little or no penalties. In summary, having a slow clock with a fast rise time may create an EMI problem if the high frequency component is ignored. Fit the parts to the application! Don't use HSSTL components in a slow application!
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Skin Depth
Skin depth is an important characteristic to understand when designing high-speed lines. The higher the frequency, the shallower the skin depth is in a conductor. For example, for a 2.5GHz signal on a standard PCB with ½ oz copper, the copper has a thickness of 0.6 mil, (15.24μ) and the signal only travels within the top 1 or 2μ of the surface. This 1 or 2 microns is the skin depth of the trace, the remaining 13.24μ simply adds to the spacing between the trace and the ground plane. Effectively the total cross sectional area of the trace that is used by the signal is the width of the trace multiplied by the skin depth. This determines the current handling capacity of the line as well as its effective resistance.
The skin depth and the effective line resistance is a dynamic number that increases as a function of Sqrt(Z) , the higher the frequency, the shallower the skin depth and the greater the effective resistance.
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At Nuvation, we have designed a multitude of high-speed traces on complex designs as an integral component of our engineering services. We've successfully completed designs with digital signal speeds up to 10GHz and RF up to 24GHz. Nuvation has invested many hundreds of thousands of dollars in tools, systems, and people to develop a "first-time-right" process flow for these high-speed board designs. We find this process is essential to ensure a clean design, especially since today many boards either can't be cut & jumped or because our Clients can't afford the time and money for an extensive debug/bring-up process.
If you have any questions regarding designing traces, and signal integrity, you can reach me at si@nuvation.com.
In the next series of articles, I will be discussing impedance matching, and how vias and stubs affect a high-speed signal.
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