So You Want To Design For Low Power...

Low power has been a primary design goal for years now, and there’s no sign of that changing anytime soon. Having a low power requirement places significant additional constraints on a design—ones that would ordinarily be secondary or non-existent. Often, a simple oversight in programming a part can lead to huge losses in battery life. This article covers some of the key aspects of designing low-power embedded devices. Much of the discussion will focus on microcontroller-based design, as this is fairly representative of a broad set of low-power applications.

How low will you go?

Before any code is written, components selected, or schematics created, one must ask: “What does ‘low power’ mean?” The answer to this question is almost always, “it depends.” For instance, it depends on the application, the typical use case, and a whole slew of tradeoffs involving cost, performance, size, etc. Here are some typical classes of devices that have vastly different power needs and power consumption profiles:

• Rechargeable, battery-operated handheld devices
  These devices often have a runtime measured in hours and are designed to be recharged frequently. They do little or no processing when “off,” but significant processing when they are running. Examples of these devices include portable media players and cellular phones.


• Devices that spend most of their time in sleep/standby
  These devices have runtimes measured in weeks or months. There is very little processing done when they are on, and the device returns to sleep mode quickly. Most of the time the device is in deep sleep or standby. Examples of these devices inlcude remote controls, portable test equipment.


• Devices that are “barely alive”
  These devices have runtimes measured in months or years. Minutes, hours, or even days can elapse between short bursts of activity. They are typically used in monitoring applications and enter run mode periodically. Examples of these devices include utility metering (primarily electricity and gas) and data loggers for research (seismology, river flow rates, etc.).

How will you measure it?

The second question to ask is: “How do I identify a low-power device?” Here again the answer is “it depends” There are many ways of defining and measuring power consumption. Look at any datasheet, product brief, or application note for a “low- power” microcontroller, and you’ll find a colorful assortment of specifications. Here are a few common ones:

• MIPS/Watt
• mA/MHz
• Low-power run-mode current consumption
• Sleep-mode current consumption

No single specification tells the whole story, and the actual performance is highly dependent on the use case. For instance, a device with a great mA/MHz specification might have an unacceptable sleep-mode current.

Standard techniques for minimizing power consumption

Despite the multitudes of product specifications, requirements, and design constraints, there is still much that can be done in any design to minimize power consumption. The following standard techniques can be used to save power on most modern microcontrollers and processors.

Eliminating parasitic peripherals

Many microcontrollers come out of reset with peripherals enabled, so disabling unused peripherals can save a significant amount of power. Often, this is simply a matter of clock gating, because turning off the clock to a peripheral will completely eliminate its power consumption. In some situations, however, peripherals have a more sinister power sink lurking in bowels of the device...quiescent current.

Quiescent current – “the silent killer!”

In applications where deep sleep is key and every microamp counts, the quiescent current consumed by peripherals becomes very important. Analog peripherals such as comparators and analog to digital converters (ADCs) are good examples where clock gating alone is not sufficient for powering down the peripheral. The figures below are taken from datasheets for Freescale’s Flexis QE series low- power microcontrollers. On the Flexis QE32, the comparator’s power consumption is in the 20 to 30 uA range. This may not seem like a lot, but, when the deepest power-down current consumption on the device is 350 nA (at Vdd = 3V), leaving that comparator on is not a viable option.


Figure 1. Excerpt from the Freescale MC9S08QE32 datasheet for the analog comparator peripheral.

Configuring unused I/O

Unused I/O can be a major source of unwanted power consumption if it is left configured as an input. In standard CMOS logic, power is only consumed when switching states from ‘on’ to ‘off’ and vice versa. The best way to handle unused I/O is to set it as an output when power must be saved (i.e., in a power-down or low-power run mode). If the pin is pulled up or down externally, it is a good idea to set the output to the value corresponding to Vdd or ground, respectively.

It is important to note that unused I/O is not limited to the I/O that is never used. Any time a peripheral or a set of I/O is not necessary, it can be re-configured as an output on-the-fly. This is generally a good idea when entering a low-power mode of operation where limited functionality is acceptable.

Run-mode clock throttling

In applications where a device will operate in an active mode of operation (the CPU is enabled and processing) for extended periods of time, it makes sense to evaluate the performance/power tradeoff more carefully. For instance, blazing fast speed is rarely necessary for low-power applications. Usually, the CPU does some rudimentary calculations on data or manages peripheral interaction with the outside world. When the CPU needs to be on but has little to do, throttling its clock down to a level where it processes data at an acceptable rate without becoming idle can save a lot power. To give an example of how much can be gained by throttling the CPU, Figure 2 contains an excerpt from the datasheet for the Texas Instruments MSP430F2132 microcontroller listing the active mode current consumption at various CPU clock frequencies.


Figure 2. Excerpt from the Texas Instruments MSP430F2132 datasheet listing the run-mode current for various CPU clock frequencies.

Taking advantage of bursty operation

Bursty operation for processing and data acquisition offers another good opportunity to minimize overall power consumption. The principle behind this technique is to minimize the time in an active mode of operation. It may be unintuitive, but performing the tasks that consume a lot of static current for a shorter period of time can be more power-efficient than doing so for a longer period of time at a lower-power mode of operation. This applies equally well to CPU run modes and high-power peripherals such as ADCs. Figure 3 contains a graphical representation of the burst-mode principle for processing data.


Figure 3. Active mode current consumption versus processing time for two microcontrollers of differing power/performance specs. The 8-bit HCS08 CPU is on the left; the 32-bit Coldfire V1 is on the right.

Figure 3 compares power consumption between two devices in the Flexis QE family of microcontrollers from Freescale. This family contains devices that feature an 8-bit HCS08 CPU as well as a 32-bit Coldfire V1 CPU. Because the Coldfire (right) can complete the processing task faster, it is out of its high-power mode quicker when the sleep interval and data-to-process remains constant. Since it is the area under the curve that represents power consumption, the lower-power run-mode on the HCS08 processor (left) is not necessarily an advantage.

Data acquisition follows this principle as well. Turning on an ADC for short periods of time only when needed minimizes the time it is actively consuming current. Interleaving the data acquisition and the processing tasks will result in a more efficient use of power.

Low-power, low-frequency clock sources can be used to manage sleep/wakeup cycles. This type of timer is standard on most modern microcontrollers. If one is not available, then highly accurate and low-power 32.768 kHz watch crystals are an ideal substitute.

Conclusion

Designing hardware and software for low power is application-specific. The most important part of the process is understanding your product and its intended use case(s) before any major design decisions are made. Most of the design process depends on factors that change with each project, but following some basic strategies, such as using only what you need only when you need it, managing parasitic peripherals, and being careful about clocking, can go a long way in minimizing power consumption. Nuvation provides turnkey product development services and can also be contracted for consulting services in areas such as system architecture, power management analysis & optimization, peer design reviews, and ala carte hardware or firmware development.