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MULTICHANNEL VIDEO FRONT END - McVFE DM6467

MULTICHANNEL VIDEO FRONT END - REFERENCE DESIGN

On Board Devices | Hardware Interfaces | System Diagram
FPGA Operation | FPGA Utilization | DM6467 Firmware | Demo Application
Package Contents | Downloads |

Nuvation's Multichannel Video Front End (McVFE) is a reference design that merges up to 16 analog video streams for encoding in TI DaVinci™ devices.

McVFE is geared for evaluation and rapid development of multichannel video encoders and video servers based on low-cost Xilinx FPGAs with TI TVP Decoders and DaVinci™ technology.

HIGHLIGHTS


Accelerate your time-to-revenue

with Nuvation’s Multichannel Video Front End (McVFE) Reference Design


Components & Pricing
Note: All three components listed below are required for a complete system

Component Pricing
1. Evaluation Board: Intended for OEMs interested in evaluating the reference design. Note, Includes:
  • McVFE printed circuit board (Board Dimensions: 6.5” x 7.5”)
  • Samtec HFEM2-020-T-05.00-SE Flex cable
  • 5V DC universal power supply (100-240V, 50-60Hz) with North American 110V AC-plug
  • Firmware for TI DM6467 DVEVM
  • Quick Start User's Guide

Reference Design Source files
(Free with some license restrictions)

  • Schematics
  • Bills of Materials
  • Layout Databases and Gerbers
  • Firmware source code
  • Xilinx FPGA Verilog Source code

McVFE-16ch-pcb
McVFE Evaluation Board

$795 USD*









*Plus shipping, applicable duties, and taxes

2. Evaluation Cable: Adapter card and cable for DM6467 DVEVM

McVFE-DM6467-adp
DM6467 EVM Adapter Card & Cable
$249 USD*


*Plus shipping, applicable duties, and taxes

3. TI DM6467 Digital Evaluation Module (DVEVM): The TMS320DM6467 Digital Video Evaluation Module (DVEVM) enables developers to start immediate evaluation of the McVFE evaluation board.



Support Packages

Package Pricing
1. Minimum Support Package:
  • Schematics
  • Bills of Materials
  • Layout Databases and Gerbers
  • Firmware source code
  • Xilinx FPGA Verilog Source code
  • Specification Docs
  • Up to 10 hours engineering support within 30 days of purchase

$5,000 USD


2. Deluxe Support Package:

  • McVFE Board
  • McVFE Adapter Card/Cable
  • Schematics
  • Bills of Materials
  • Layout Databases and Gerbers
  • Firmware source code
  • Xilinx FPGA Verilog Source code
  • Specification Docs
  • Up to 40 hours engineering support within 90 days of purchase


Additional Services

  • Customization Services
    • Nuvation offers comprehensive engineering services to develop custom video encoders and other electronic design services
  • Production Manufacturing Services
    • We can support transition to volume manufacturing with one of our certified EMS providers or an EMS firm of your choice
    • Regulatory certification, RoHS Compliance, Test Fixturing, AVL crossing, Pilot and Production verification



ON BOARD DEVICES

4 TI TVP5154 video input decoders for NTSC video decoding with independent scalers for up to 16 channels. PAL/SECAM support available as add-on.
Xilinx Spartan 3A FPGA, XC3S700A-5FGG400
16-bit, 256Mb DDR2 memory interface at 133MHz
SPI Flash and hard reset button for auto boot up configuration. The FPGA can also be configured by the DM6467 firmware application, which is the normal mode of operation. NOTE: The TI DM6467 DVEVM must be purchased separately.


McVFE HARDWARE INTERFACES

16 RCA IN: 16 NTSC video inputs with an optional anti-aliasing filter per input. Contact Nuvation to support other video standards.
I²C: When connected, the DM6467 EVM is the I²C master and all I²C ports on the McVFE board are slaves. In stand alone mode, the McVFE Xilinx FPGA is the I²C master
DM6467 EVM Cable Adapter: Cable and adapter board to connect to TI DM6467 DVEVM
LEDs: For power and general purpose display (FPGA programmable)
JTAG: Compatible with the Xilinx Platform cable USB (HW-USB-G)
Power connector: External AC/DC power adapter (included) supplies 5V


SYSTEM DIAGRAM



FPGA THEORY OF OPERATION

The Xilinx Spartan 3A FPGA on the McVFE board takes 16 independent asynchronous BT.656 video inputs and concatenates them into a single BT.1120 video output.
The BT.1120 video output from the FPGA is sent to a TI DaVinci™ DM6467 DSP on the TI DM6467 DVEVM board, using a 16-bit capture port. The design is parameterized to support a wide range of target applications with either a single 8-bit or 16-bit video capture port.
Input channels are independently decoded. All data between SAV and EAV is preserved in memory to save any ancillary data in the VBI. Channels are then read from memory and sent to the output port, sequenced on a priority basis.



FPGA UTILIZATION

For a 4-channel design compiled in a XC3S400A-4FGG400C:
Number of DCMs 1
Number of BRAMs 7
Number of Slices 2888 (81%)
For a 8-channel design, compiled in a XC3S400A-4FGG400C:
Number of DCMs 1
Number of BRAMs 11
Number of Slices 3434 (95%)
For a 16-channel design, compiled in a XCS3700A-FGG400C:
Number of DCMs 1
Number of BRAMs 19
Number of Slices 5551 (94%)



DM6467 FIRMWARE

FPGA programming driver
Video for Linux 2 (V4L2) accessible McVFE driver*
Embedded Linux demo application to display the individual video streams on a 1080i display
EDMA driver and API
McVFE FPGA configuration driver and API
McVFE TVP5154 configuration driver (no API)
Linux kernel patch**
Firmware supports frame mode only


* Video for Linux 2 (V4L2) is supported using the McVFE V4L2 video decoder, a plug-in compatible with the DaVinci™ V4L2 driver framework. Note: The DaVinci™ V4L2 driver framework is provided with the DM6467 Digital Video Evaluation Module software development kit. The TVP5154 driver is used by the McVFE V4L2 driver for configuration of the TVP5154 video decoders.

** Linux Kernel Patch
A patch is included for the DM6467 Digital Video Evaluation Module software development kit, and is applied to the demonstration Montavista Linux Kernel. The Linux Kernel patch modifies the DaVinci™ VPIF driver to add 16 bit wide video capture support for NTSC and CIF. By default the driver only supports 8-bit wide NTSC capture and does not support the CIF.



DEMO APPLICATION

The DM6467 firmware demo application loads the FPGA bitstream during initialization and programs registers in the McVFE FPGA and TVP5154 devices via I²C commands. It then configures the Video Port Interface (VPIF) in the DM6467 DSP to capture the video stream coming from the FPGA.
During normal operation, for every frame of video that is captured, the demo application searches the capture buffer for a vertical ancillary packet (SMPTE 291 compliant) at a known location that identifies the channel index for that frame. It then copies (using DMA) the active video from the input capture buffer to the corresponding region in the output display buffer.
The demo application supports frame mode only.
NOTE: When using 16 input channels, the TVP5154 devices on the McVFE board scale the active video by a factor of two both horizontally and vertically, and add horizontal blanking between lines to maintain the same line-rate.



McVFE PACKAGE CONTENTS

McVFE printed circuit board (Board Dimensions: 6.5” x 7.5”)
5V DC universal power supply (100-240V, 50-60Hz) with North American 110V AC-plug
Instructions for downloading firmware and FPGA code
Quick Start Guid

McVFE Adapter Cable/Card PACKAGE CONTENTS

DM6467 EVM Cable Adapter
Samtec Flex cable


DOWNLOADS

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