Nuvation is a major FPGA design center with advanced capabilities in Actel, Altera, Lattice, QuickLogic, and Xilinx devices. We have design tools for all major platform technologies as well as advanced tools such as Synplify Pro, ModelSim, Active-HDL, MATLAB/Simulink, System Generator, ChipScopePro, DSP Builder, and SOPC Builder. Besides advanced capabilities referenced below, Nuvation is quite capable of writing simple state machines and glue logic in various PLD devices. Nuvation takes your design from concept through specification, design, development, IP integration, RTL verification, and migration to ASIC or HardCopy.
In addition to developing custom logic solutions, Nuvation also develops and licenses certain IP cores and provides IP integration services. Please see our IP section for more information on Nuvation IP.
- Areas of Expertise:
- High-speed designs involving multi-gigabit SERDES
- High-speed DDR, QDR, chip-to-chip I/O
- Ethernet over SONET, FibreChannel over SONET, RPR, GbE, XAUI, GFP
- SPI-3, SPI-4.2, T1/E1, EPON, VoIP, Packet Processing
- RapidIO, Infiniband, RocketIO, Serial Lite
- PCI-Express (PCIe) up to x16 lanes
- DSP algorithm development, digital signal processing in FPGAs
- Embedded MCUs such as PPC, uBlaze, Nios II
- High-speed video/image processing (medical, defense, broadcast head-end)
- MPEG-2, MPEG-4, WM9/VC-1, H.264 consumer and broadcast video (QCIF, CIF, D1, HD)
- Cable modems/Set Top Boxes: DOCSIS, QAM Demodulators, xDSL filtering
- ATA (IDE), ATAPI, SATA-I/II, SAS, iSCSI
Project Examples
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Ethernet over SONET |
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8xGbE to OC-192 SONET IP Core design and integration |
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SPI-4.2 interfaces |
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GbE Muxing, flow control |
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AIRbus, MCU Interface |
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Up to 9.6K Jumbo Packets |
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100% Bandwidth with 0 dropped packets |
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Implemented with no off-chip memory |
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Project managed multinational design team involving 4 companies with 7 design centers across 3 continents |
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16-lane PCI-Express Physical Layer IP Core |
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Validated in custom Hardware |
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Tester was 34-layer PCB with 32 diff pairs at 2.5GHz |
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High-speed QDR (320 bit x 500 Mb/s) |
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Achieved 80 Gbps data throughput in Stratix GX40 FPGA |
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Designed and verified in 8 months |
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First-time-right! |
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NPU, CAM , CPU Interfacing |
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500K gate design developed for a
client with a mission-critical deadline |
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Design start to bitstream release in 6 weeks! |
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Many subsequent projects with various NPU/CAM/MCU configurations |
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Digital Signal Processing |
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Real-time video processing, 14 bit at 500 MSPS |
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Max utilization of DSP blocks in Stratix EP1S80 |
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Post-processing in TI C6713 |
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Other DSP co-processing designs with Virtex-II Pro, Virtex-4, TS201, and DM642 |
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Nuvation has been a select member of our Certified Design Center program for several years, as well as a design services vendor to Altera. We have been consistently impressed with the caliber of their organization, the time-to-market acceleration that they enable, and their strong track record across our broad customer base. 
