PCB Layout: Creating Perfect SMT Footprints

By Pi Zhang | Mar 31, 2013

To create robust and cost-effective printed circuit boards, layout designers need to follow best practices for PCB footprint generation.  The quality of a PCB footprint directly impacts the performance, reliability and quality of the PCB assembly.

The first step in designing a perfect PCB footprint is contacting your chosen fabrication vendor and contract manufacturer, and understanding their specific Design for Manufacturing (DFM) guidelines.  Whether you’re designing a prototype PCB or a high-volume product, following DFM guidelines will reduce the number of manufacturing defects you encounter, saving money by improving yield and eliminating debug time.

Industry standards

In addition to DFM Guidelines, there are a number of industry standards provided by the Association Connecting Electronics Industries (IPC).  The IPC standard pertaining to SMT footprints is IPC-7351, Generic Requirements for Surface Mount Design and Land Pattern Standard. There are various schematic capture and EDA tools that can be used for PCB layout, including Altium Designer, Cadence Allegro, and Mentor Graphics Expedition. At Nuvation we use an IPC-7351 compliant layout tools, meaning that the formulas and methodology in IPC-7351 for calculating land-pattern geometry are built in. Regardless of your choice in software, it’s best to take a close look at how the design rules are set up and make sure they’re in line with the DFM guidelines from your fab and assembly vendors.

An SMT footprint is IPC-7351 compliant if the calculated solder fillets meet the component-specific criteria in the standard.  Each component has toe, heel, and side solder fillets, as illustrated below.

solderfillets.jpg
 

When creating a footprint, you should verify that the solder fillets meet the IPC criteria, and the footprint meets the DFM guidelines from your vendor. Let’s look at an example of a QFN package. QFNs (quad-flat no-leads), SONs, and all components in the no-lead family are an enticing package choice for layout designers because their small size, perimeter I/O pads, and large thermal/ground pad.  This combination of factors makes them ideal for designs where the routing is tight or heat dissipation is important.

QFN_small.jpg
QFN package

 

The downside is that QFNs are also notoriously difficult for PCB assembly, due to their fine pitch and flat bottom.  In addition, the heatsinking provided by the thermal pad makes them difficult to rework.

Here is the IPC-7351 standard for QFN packages:

IPC-7351 Nominal land-pattern for QFN package
Solder FilletsMinimum Length
Toe0.30 mm
Heel0.00 mm
Side-0.04 mm

Below we describe how the footprint is created, when we take both the IPC-7351 criteria and the capabilities of PCB Fabrication and PCB Assembly vendors into consideration.

Case A:

PCB Fabrication Vendor’s DFM Guidelines:

  • Minimum LPI solder-mask pad clearance is 2.5 mil
  • Minimum LPI solder-mask web is 3 mils

PCB Assembly vendor’s DFM guidelines

  • solder-mask web must be present between pads

Case B:

PCB Fabrication Vendor’s DFM Guidelines:

  • Minimum LPI solder-mask pad clearance is 2.5 mil
  • Minimum LPI solder-mask web is 5 mils

PCB Assembly vendor’s DFM guidelines

  • Solder-mask web must be present between pads

Case C:

PCB Fabrication Vendor’s DFM Guidelines:

  • Minimum LPI solder-mask pad clearance is 3mil
  • Minimum LPI solder-mask web is 5 mils

PCB Assembly vendor’s DFM guidelines

  • Comfortable with hand
  • solder mask gang (no solder-mask web between pads)

The table below shows the land-pattern A, B and C with the DFMA rules, design rules and whether or not the solder fillet goals are met as per IPC-7351

 Footprint

(IPC-735B Nominal)

A

footprintA-125x125.jpg

 

B

footprintA-125x125.jpg

C

footprintA-125x125.jpg
DFMA Rule   
Minimum solder mask web

3 mils

5 mils

5 mils

Minimum solder mask pad clearance

2.5  mils

2.5 mils

3 mils

Design Rule   
Pad-to-Pad spacing

8 mils

10 mils

8 mils

 (11-mill was needed for the DFMA, a SM gang is made instead)

Minimum solder fillet goal   
Heel

met

met

met

Side

met

failed (-0.06mm)

met

Toe

met

met

met

PCB Footprints for 0.5mm Pitch QFN and DFMA rules

In case A, the footprint is perfect, as it meets both DFM guidelines and IPC-7351 criteria.

In case B, the DFM guidelines have significant impact on the land pattern geometry, and the side fillet does not comply with IPC-7351. This situation should be discussed with the fab and assembly vendors.

In case C, solder-mask gang was employed as the pad-to-pad spacing was too large, as per the supplied DFM guidelines, to let the land patterns meet the criteria. Therefore, the pad-to-pad spacing could be reduced to 8 mils from the 11 mils. For use of footprint C, the customer should make sure that the CM is able to handle solder mask gang on 0.5mm pitch package.  (This may be a possible solution for Case B as well.)

Understanding the DFM guidelines and IPC-7351 criteria will allow you to reduce the number of defects in your PCB assemblies, saving you time and money.